Technical Field
The present disclosure relates in general to a memory structure and a manufacturing method thereof, and particularly to a 3D memory structure and a manufacturing method thereof.
Description of the Related Art
An NVM device which is able to continually store information even when the supply of electricity is removed from the device containing the NVM cell has been widely adopted by bulk solid state memory applications in the art.
The method for fabricating an NVM device having a vertical channel, such as a vertical channel NAND flash memory device, generally includes steps as follows: a multilayered stack configured by a plurality of insulating layers and a plurality of polysilicon layers alternatively stacked with each other is firstly provided on a semiconductor substrate; at least one through hole or trench is then formed in the multilayered stack, and a memory layer with silicon-oxide-nitride-oxide-silicon (SONOS) structure and a polysilicon channel layer are formed in sequence on the sidewalls of the through hole/trench, whereby a plurality of memory cells are defined at the intersection points formed by the SONOS memory layer, the channel layer and the polysilicon layers; and the memory cells are electrically connected to the semiconductor substrate that can serve as a bottom common source line for performing a block erase operation of the NVM device through the channel layer.
However, as the applications of memory devices increase, the demand for the memory devices focuses on small sizes and large memory capacities. For satisfying the requirements, a memory device having a high element density and a small size and a simplified manufacturing method thereof are in need.
Therefore, there is a need of providing a memory device and the method for fabricating the same to obviate the drawbacks encountered from the prior art.